FPGA Night (24 Sep, 7-10PM)

By on September 22, 2013

We will continue to work on VGA by creating a VHDL module that can run off of a variable timing (defined at time of creation) and then creating a package that defines a series of VGA timings that the new VHDL module can use. If time permits, we will start talking about ideas for displaying […]

FPGA Night (17 Sep, 7-10PM)

By on September 15, 2013

We will be continuing from last week’s VGA designs. There were problems with some people not being able to display anything on their monitors. After some tweaking of the timings, I think everything should be good to go. If you have a monitor with a VGA connection and can bring it, please do. We have […]

Unallocated Space’s 3rd Anniversary Party and Potluck

By on September 11, 2013

It’s that special time of the year again. No, not the holidays, but you’re close. It’s Unallocated Space’s 3rd Anniversary Party and Potluck. Oh Yeah! http://www.meetup.com/ticketing/ticket_printable/?event_id=139345512 Unallocated Space’s 3rd Anniversary Party and Potluck On Saturday, October 5th, 2013 from 12:00 noon to midnight, you and your guest are invited to join us to celebrate in […]

FPGA Night (10 Sep, 7-10PM)

By on September 8, 2013

We will be going over how to make an FPGA drive an LCD monitor. With any luck I will have DB15 (VGA) breakout cables made before class. For those of you who need a breakout cable, please let me know as soon as possible. If you have a monitor with VGA connector(s) and can bring […]

FPGA Night (20 Aug, 7-10PM)

By on August 18, 2013

We will continue working with Serial/EPP data transfers. Here are the goals based on dev board type: Mojo: 1. Create a FIFO to buffer data being written to the serial (from FPGA to computer) 2. Write data as quickly as possible to the FIFO until it is full, then wait for the FIFO to become […]

FPGA Night (13 Aug, 7-10PM)

By on August 12, 2013

We will continue working on sending data from the FPGA to a laptop. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process to complete (it usually takes 15-30 minutes). Check out http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html and download the ISE Design […]

FPGA Night 16 July (7-10PM)

By on July 15, 2013

We will be designing VHDL code to send data to an SN74HC595N shift register. If time permits we will create a design that reads the output of the shift register at higher speeds (> 1MHz) until the register begins to send invalid data. Because of the cost of FPGA dev boards, we will not have […]

FPGA Night (2 July 7-10PM)

By on July 1, 2013

We will be creating a generic entity to drive a seven segment display and then use push buttons to control the seven segment (count up and count down). Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process […]

FPGA Night (25 June 7-10PM)

By on June 25, 2013

We will be using push buttons to interface with the FPGA as well as learning how to debounce the inputs. If time permits, we will also cover First In First Out (FIFO) buffers. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to […]

FPGA Night (18 June, 7-10PM)

By on June 17, 2013

We will be continuing the LCD interface project. The goal for the night will be to build the parent process for driving the finite state machine and sending commands to the LCD. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait […]

Arduino Night (14 June, 7-10PM)

By on June 10, 2013

This will be a repeat of the last class on LCD interfacing. Several people were unable to make it last time, so we will be covering it one more time. Required Items: Laptop Arduino USB cable for your Arduino Breadboard Jumpers for breadboard Provided Items: LCD If you need any items in the required items […]

FPGA Night (11 June, 7-10PM)

By on June 10, 2013

We will be starting the LCD interface project. The goal for the night will be to get the finite state machine running properly. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process to complete (it usually takes […]

FPGA Night (4 June 7-10PM)

By on June 3, 2013

We will be covering interfacing with 7 segment displays. This is the precursor to the next class which will cover interfacing with 2×20 character LCD screens. Agenda: 1. Determine pinout of 7 segment display 2. Create a map of the pins 3. Flash all segments at once 4. Create a ROM lookup table to count […]

UnalloCTF Wrap-up

By on May 31, 2013

UnalloCTF, it happened, it was awesome. We had 13 teams participate, 6 of which were remote. There were about 30 flags on 11 targets for a total of 4800 possible points. Points of entry were available for most Pen Testing Skillsets: Web Exploitation Service Exploitation SQL Injection Direct Database Login Telnet We had a separate […]