We will be covering interfacing with 7 segment displays. This is the precursor to the next class which will cover interfacing with 2×20 character LCD screens.

Agenda:
1. Determine pinout of 7 segment display
2. Create a map of the pins
3. Flash all segments at once
4. Create a ROM lookup table to count 0-F

Required Items:
1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process to complete (it usually takes 15-30 minutes). Check out http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html and download the ISE Design Suite for your OS.
2. Some Xilinx Spartan 3 or greater FPGA development board (must be Xilinx!!). We prefer the Mojo or Digilent Basys II.
3. USB cable for your FPGA dev board.
4. Breadboard
5. Jumper wires

Provided Items:
1. 7 segment display
2. Resistors (current limiting)

Because of the cost of FPGA dev boards, we will not have extras. If you have questions about what board to get, please E-Mail fpga@unallocatedspace.org.

Since the space runs off of donations, we would like to mention that the recommended donation for this class is $10. It is by no means a requirement! Attendance to the space, and this class, is 100% free to all!